David Atienza

David Atienza is a Full Professor of Electrical and Computer Engineering, leads the Embedded Systems Laboratory (ESL), and serves as the Associate Vice President for Research Centers and Platforms at EPFL, Switzerland. His research interests focus on system-level design methodologies for energy-efficient multi-processor system-on-chip (MPSoC) architectures for next-generation computing systems and edge AI embedded systems (particularly smart wearables and medical devices) in the Internet of Things (IoT) era. In these fields, he is a co-author of more than 450 publications and 14 patents, and has received several recognitions and awards, among them, the 2024 Test-of-Time Best Paper Award at the IEEE/ACM CODES+ISSS Conference for the most influential paper in system co-design in the last 15 years, the IEEE/ACM ICCAD 10-Year Retrospective Most Influential Paper Award in computer-aided design in 2020, the DAC Under-40 Innovators Award in 2018, and an ERC Consolidator Grant in 2016. He served as President of IEEE CEDA in 2018-2019 and as Chair of the EDAA from 2022 to 2024. He is a Fellow of IEEE and of ACM, and a Member of the Academia Europaea.

Abstract:

Brain‑Inspired Memory‑Centric Architectures for Ultra‑Low Power and Adaptive Edge AI Wearables

Edge AI is entering a new era where functionality is defined not just by efficient inference, but by on‑device learning, continual adaptation, and user personalization. For wearable systems, this shift exposes a fundamental limitation of today’s architectures: energy is no longer spent on computation, but on moving data back and forth across memory hierarchies. As a result, this keynote presents a vision for brain‑inspired, memory‑centric edge AI architectures that rethink where and how edge AI systems operate. Inspired by architectural principles of biological intelligence, such as local learning, event‑driven operation or and tight memory-compute integration, this talk advocates that hardware-software co‑design concepts can overcome the energy and latency barriers of conventional computing systems to conceive the next generation of edge AI wearables.

In particular, the future of edge AI will not be built around bigger models, but around co-designed system architectures that learn continuously, adapt locally, and can operate with brain‑like efficiency. Therefore, by bringing computation to memory and leveraging event‑driven sensing and fine‑grained adaptive learning engines, these new edge AI architectures can unlock ultra‑low power and real‑time adaptation to the specific user context. At scale and considering system manufacturing costs, advances in heterogeneous integration and open design frameworks can enable collaborative, privacy‑preserving intelligence across networks of edge AI wearable devices.